Zynq All Programmable SoC Sobel Filter Implementation Using the Vivado HLS Tool

This application note describes how to generate the Sobel edge detection filter in the
Zynq™-7000 All Programmable SoC ZC702 Base Targeted Reference Design (TRD) using the
Vivado™ High-Level Synthesis (HLS) tool. The techniques described in this application note
present the fundamental flow for integrating an IP block generated by the Vivado HLS tool into
a Zynq AP SoC-based system.