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“奋进”号航天飞机已成功搭载赛灵思抗幅射Virtex-5QV FPGA 进入国际空间站

发布者:jackzhang 时间:2011-06-24 17:12:22

虽然本月发射的“奋进号”航天飞机是其历史上的最后一次飞行,但它却实现了另一项突破:第一次在空间站使用 Xilinx® 宇航级 Virtex®-5QV 器件。在 STS-134 与国际空间站进行对接后,宇航员部署了一项名为 SEUXSE-II(单粒子翻转Xilinx-Sandi 实验第 2 版)的实验,它是 MISSE-8 一揽子实验计划的一部分,已取代 MISSE-7 及其 SEUXSE-I 实验。90nm 的 Virtex®-4QV 和 65nm 的 Virtex-5QV 均为板上 SEUXSE-II,在其上可运行处理器密集型应用。

 ALBUQUERQUE, N.M. — Satellite systems in space keyed to detect nuclear events and environmental gasses currently face a kind of data logjam because their increasingly powerful sensors produce more information than their available bandwidth can easily transmit.

Experiments conducted by Sandia National Laboratories at the International Space Station preliminarily indicate that the problem could be remedied by orbiting more complex computer chips to pre-reduce the large data stream.

While increased satellite on-board computing capabilities ideally would mean that only the most useful information would be transmitted to Earth, an unresolved question had been how well the latest in computing electronics would fare in the harsh environment of outer space.

The fear had been that high-energy particles might collide with a transistor and, by changing a zero to a one, alter the value of an individual calculation, producing incorrect results in what could be matters of national security or critical environmental calculations.

52 “奋进”号航天飞机已成功搭载抗幅射 Virtex-5QV FPGA 进入国际空间站

The Sandia experiments are providing insights into the effects of high-energy radiation on these computing electronics, enabling mitigation of these potentially crippling effects in future processing-architecture designs.

“We’re getting true on-orbit data from a space environment,” said Dave Bullington, Sandia’s lead engineer on the experiment taking place in low Earth orbit. “Data messages are being sent back every four minutes.”

How it works

NASA’s “Materials on the International Space Station Experiment” (MISSE) program, under the direction of the Naval Research Laboratory, provides opportunities for low-risk, quick and inexpensive flight tests of materials and equipment in space aboard the ISS.

MISSE provides suitcase-like containers called Passive Experiment Containers to hold multiple experiments. These are mounted by astronauts on the exterior of the ISS, thus exposing the experiments to the rigors of space.

The seventh in an ongoing series of MISSE flights, MISSE 7 for the first time offered researchers power and data connections provided by the ISS from which to run actively powered experiments.

On Nov. 16, 2009, the space shuttle launched carrying the MISSE 7 equipment and on Nov. 23, astronauts manually deployed these containers on the exterior of the ISS. Sandia has been receiving data from this research payload ever since.

At the heart of these new computing architectures are powerful yet flexible computing chips, configurable to support different missions. These chips are called reconfigurable field-programmable gate arrays (FPGAs).

Since these FPGAs are reconfigurable rather than limited to a predefined architecture, their circuits can be overwritten, somewhat the way a read-write compact disk has more possible uses than a read-only disk. This makes prototyping easier and also permits changing missions on satellites previously designed for other purposes.

Because new generations of FPGAs available from commercial suppliers may not have been fully tested for reliable performance in space, Sandia engineers help validate device performance in a spacelike environment before the devices are integrated into high-consequence operational systems.

Sandia, in a partnership with Xilinx,Inc., designed the SEU Xilinx-Sandia Experiment (SEUXSE) for this opportunity to fly on MISSE 7. SEUs, or single event upsets, refer to electronic changes caused by collisions with a single particle. The U.S. headquarters of Xilinx is in San Jose, Calif.

SEUXSE contains space-qualified Virtex 4 FPGA and a nonspace qualified Virtex 5 FPGA from Xilinx. Converting the ISS power to levels compatible with the Virtex devices are Sandia-designed power converters known as point-of-load (POL) converters.

The POL design for SEUXSE is the first time these efficient, high-quality power converters have been used in space.

Special algorithms were developed and programmed into both of these Virtex FPGAs to detect and report particle-induced errors while the FPGAs were running typical satellite data processing tasks.

With the data collected from this platform, researchers in future Sandia programs will know exactly how these FPGAs and POL converters perform in the space environment and how to design mitigation approaches into these processing routines to account for upsets encountered in space.

A second experiment called SEUXSE II, featuring even more recent computing components, has already been prepared to lift off on a future shuttle flight as part of MISSE 8.

For SEUXSE II, Sandia researchers replaced the nonspace-qualified version of the Virtex 5 from Xilinx with an early release version of the space-qualified Virtex 5.

“Fortunately,” said Sandia SEUXSE researcher Jeff Kalb, “the new Virtex 5 from Xilinx had a compatible footprint to the previous Virtex 5 and we could leverage the hardware that was designed for MISSE 7.”

MISSE 8 is expected to launch on the space shuttle in July 2010.

When it is deployed on the ISS, it will replace the MISSE 7 Passive Experiment Containers, which will be returned to earth on the shuttle, allowing Sandia researchers to analyze SEUXSE hardware after being in orbit.

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