Adam Taylor玩转MicroZed系列第87 部分:SDSoC之三: 再让 SDSoC 转起来
By Adam Taylor
So far in our journey with the Xilinx SDSoC development environment, we have created our first application, run it successfully on the ZedBoard, and obtained performance data for the multiply-and-add function when we run both the reference code and the code to be moved into the hardware within the PS side of the device.
Having established that both functions take a similar amount of time to execute, we are going to now move the multiply-and-add function into the PL (programmable logic) side of the Zynq SoC. It’s amazing how simple this is to achieve.
When we look at the file structure within the src directory of the example we will see the following:
The next step is to offload just one of these functions to the PL side of the Zynq SoC. We achieve this by one of two methods:
Toggling the mmult() function to be accelerated within the hardware results in an [H] (for “hardware”) being added to the back of the function as shown below:
You will also see the function you have selected under the SDSoC Hardware Functions at the top, beneath your project within the project explorer tab:
Once we’ve done this, SDSoC linker will call automatically Vivado HLS and Vivado to implement the functions within the PL side of the SoC the next time we build the project. It will also create the relevant drivers within the software to support this move into hardware. (We will look more at these in the next blog).
In reality the offloading of the function to the PL side of the device becomes seamless, except that you get a significant performance increase.
When I moved the mmult() function into the hardware after compilation and generated the SD Card image, the speed increase was significant:
The execution time is only 52444 / 183289 = 0.28 or 28% of the time taken for execution last week when this all ran in software (183289 was the execution time last week).
Compared to the performance of the same function executed within the Zynq SoC’s PS (processor system), we have achieved this significant—better than 3x—performance in execution time by a simple mouse click.
Of course in more complex designs, there will be several functions we wish to accelerate. That is where the real power of SDSoC comes into its own and we will be looking at these situations.
In the next blog, we will look more closely at how SDSoC can offload and accelerate functions within the Zynq PL. This is just the start of the journey.
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本视频基于Xilinx公司的Artix-7FPGA器件以及各种丰富的入门和进阶外设,提供了一些典型的工程实例,帮助读者从FPGA基础知识、逻辑设计概念
本课程为“从零开始大战FPGA”系列课程的基础篇。课程通俗易懂、逻辑性强、示例丰富,课程中尤其强调在设计过程中对“时序”和“逻辑”的把控,以及硬件描述语言与硬件电路相对应的“
课程中首先会给大家讲解在企业中一般数字电路从算法到流片这整个过程中会涉及到哪些流程,都分别使用什么工具,以及其中每个流程都分别做了
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