how to break a timing loop

发布: 2017-7-01 08:26 | 作者: xiaoyisimonguo | 来源: EETOP 赛灵思(Xilinx) 社区

I got the information saying timng loop detected: nformation: Timing loop detected. (OPT-150) I_ORCA_TOP/I_RISC_CORE/I_REG_FILE/REG_FILE_A_RAM_1/OEB1 I_ORCA_TOP/I_RISC_CORE/I_REG_FILE/REG_FILE_A_RAM_1/IO1[16] and a lot of warning saying Warning: Disabling timing arc between pins 'OEB1' and 'IO1[16]' on cell 'I_ORCA_TOP/I_RISC_CORE/I_REG_FILE/REG_FILE_A_RAM_1' to break a timing loop. (OPT-314) Warning: Disabling timing arc between pins 'OEB1' and 'IO1[16]' on cell 'I_ORCA_TOP/I_RISC_CORE/I_REG_FILE/REG_FILE_A_RAM_1' to break a timing loop. (OPT-314) They looked that DC is suggesting that I could disabling timing arc between OEB1 and IO1[16] to break a timing loop Please help, how do I do that, disabling timing arc between OEB1 and IO1[16]
swary (2017-7-03 10:44:08)
insert DFF in the timing loop
xiaoyisimonguo (2017-7-03 22:16:07)
回复 2# swary Thank you for replyingCould you explain more in details how? Change the source code?
swary (2017-7-04 08:19:59)
I have no experience about it. Only has a little information about. I work on front-end.

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